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Espressif Systems /ESP32-C2 /SYSTEM /PERIP_CLK_EN1

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Interpret as PERIP_CLK_EN1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CRYPTO_ECC_CLK_EN)CRYPTO_ECC_CLK_EN 0 (CRYPTO_SHA_CLK_EN)CRYPTO_SHA_CLK_EN 0 (DMA_CLK_EN)DMA_CLK_EN 0 (TSENS_CLK_EN)TSENS_CLK_EN

Description

peripheral clock gating register

Fields

CRYPTO_ECC_CLK_EN

Set 1 to enable ECC clock
CRYPTO_SHA_CLK_EN

Set 1 to enable SHA clock
DMA_CLK_EN

Set 1 to enable DMA clock
TSENS_CLK_EN

Set 1 to enable TSENS clock

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data